For Ultrascale+ this may still make sense, as the space savings in embedded applications may be significant. However, I've never seen Versal to fit in that space? In my mind, Versal is useful for larger, power-hungry beasts. Once you're there, you may as well make use of the flexibility of moving all of the RF off chip and therefore being able to more carefully select devices with the required parameters.
I've seen lots of integrated RF transceivers that were tightly coupled to the FPGAs, but not shared on the same SoC.
So I guess the tl;dr, is that it is not because defense doesn't like integrated packages, they just haven't been worth it considering the design goals. Defense does move slow, but this is more about being able to field "military-grade" solutions that work well in challenging RF environments, and once that is possible the government will start to pay for it.
Lot of phased-array radar and electronic warfare applications.
> with production shipments expected to begin in the first half of 2027.
Whoa, that feels wildly far off.
Hoping to heck we see AMD not rest on the laurels & get good at CXL, start offering on chip UCE Ethernet and UALink interconnect. Also would really like to see on-package USB4 80Gbps; AMD really lead the way with getting good at IO and allowing users to reuse lanes as either PCIe or SATA or uh what was that third... Continuing to offer robust io is something Xilinx folks should be excellent at.
And yeah they should hopefully have a significant cellular revenue stream too! Grow that! It was neat seeing Lattice stop by the OCP EvenStar mailing list to promote their fpgas. Would be great to see similar outreach of Xilinx making visible motions to connect with & be in sync with our planet's better open source cellular efforts too. https://ocp-all.groups.io/g/ocp-evenstar/message/121
Also bring involved with software is required. Xilinx did great stuff with for example their bpf->fpga compiler nanotube, way before Intel's recent release of the p4->Tofino compiler Intel recently released (now that they are stepping away from Tofino, boo), https://github.com/Xilinx/nanotube
I'd love to see pushes into the software stack too. How can (another ex-Facebook effort, lol) Magma take advantage of & offload more and more to fpga, doing more cellular and more networking/smartnic? https://www.linuxfoundation.org/press/linux-foundation-conne...
Lab gear...?
Does it make sense in anything with higher sales volumes, or would it always make sense to make dedicated silicon with hardware offload for one specific protocol?
5G/6G base stations?
Funny thing is that these ADC/DAC/RF front-ends aren't ghat uncommon. A lot of wireline or wireless SoCs have such high performing blocks, but they aren't general purpose. They are rather optimized for the application and the performance far exceeds this kind of general purpose stuff.
Oh, also, these days one can buy IPs from companies like Socionext or OmniDesign which are in a similar space. These have IPs in 16/7/5nm typically. Anyone willing to spend 30 milion+ usd can have an SDR chip in volume production in like 4-5 years, which is a typical development cycle.
Custom designed DSP almost always outperforms FPGAs because you can get the most out of the process technology. Also, FPGAs are often in 2-3 generation old process nodes. It is just way more expensive, but for these customers the performance edge often outperforms the price. High frequency trading companies cone to mind. They have transitioned from FPGAs to ASICs wherever it makes sense.
As usual, you have to accept a trade-off between different features depending on the number of channels you want.